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Shoestring: probabilistic soft error reliability on the cheap

Published:13 March 2010Publication History

ABSTRACT

Aggressive technology scaling provides designers with an ever increasing budget of cheaper and faster transistors. Unfortunately, this trend is accompanied by a decline in individual device reliability as transistors become increasingly susceptible to soft errors. We are quickly approaching a new era where resilience to soft errors is no longer a luxury that can be reserved for just processors in high-reliability, mission-critical domains. Even processors used in mainstream computing will soon require protection. However, due to tighter profit margins, reliable operation for these devices must come at little or no cost. This paper presents Shoestring, a minimally invasive software solution that provides high soft error coverage with very little overhead, enabling its deployment even in commodity processors with "shoestring" reliability budgets. Leveraging intelligent analysis at compile time, and exploiting low-cost, symptom-based error detection, Shoestring is able to focus its efforts on protecting statistically-vulnerable portions of program code. Shoestring effectively applies instruction duplication to protect only those segments of code that, when subjected to a soft error, are likely to result in user-visible faults without first exhibiting symptomatic behavior. Shoestring is able to recover from an additional 33.9% of soft errors that are undetected by a symptom-only approach, achieving an overall user-visible failure rate of 1.6%. This reliability improvement comes at a modest performance overhead of 15.8%.

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        • Published in

          cover image ACM Conferences
          ASPLOS XV: Proceedings of the fifteenth International Conference on Architectural support for programming languages and operating systems
          March 2010
          422 pages
          ISBN:9781605588391
          DOI:10.1145/1736020
          • General Chair:
          • James C. Hoe,
          • Program Chair:
          • Vikram S. Adve
          • cover image ACM SIGARCH Computer Architecture News
            ACM SIGARCH Computer Architecture News  Volume 38, Issue 1
            ASPLOS '10
            March 2010
            399 pages
            ISSN:0163-5964
            DOI:10.1145/1735970
            Issue’s Table of Contents
          • cover image ACM SIGPLAN Notices
            ACM SIGPLAN Notices  Volume 45, Issue 3
            ASPLOS '10
            March 2010
            399 pages
            ISSN:0362-1340
            EISSN:1558-1160
            DOI:10.1145/1735971
            Issue’s Table of Contents

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          Publication History

          • Published: 13 March 2010

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          ASPLOS XV Paper Acceptance Rate32of181submissions,18%Overall Acceptance Rate535of2,713submissions,20%

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