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A framework for verification of SystemC TLM programs with model slicing: a case study

Published:05 June 2016Publication History

ABSTRACT

In this paper, we evaluate the effectiveness of model slicing to provide assurance about correctness of SystemC TLM programs. The need for such assurance is important since SystemC has become a de-facto standard for building systems with hardware/software co-design. Existing approaches that enable one to transform the given SystemC TLM program into an UPPAAL model that can be verified suffer from models that result in state space explosion. This problem becomes even more complex when verifying fault-tolerance. Model slicing has the potential to provide a solution to this problem. Therefore, we focus on developing a model slicer that extends existing work on model slicing and combines it with tools to generate UPPAAL models from SystemC TLM programs and tools to add the impact of faults to those UPPAAL models. The experimental results show that with the proposed framework, the designer is capable of verifying even very complex SystemC TLM models, which would have been impossible without the proposed approach.

References

  1. Getting Started with TLM-2.0. http://www.doulos.com/knowhow/systemc/tlm2/.Google ScholarGoogle Scholar
  2. Karlsruhe SystemC Parser Suite (KaSCPar). http://forge.greensocs.com/en/Projects/KaSCPar/.Google ScholarGoogle Scholar
  3. Open SystemC Initiative (OSCI): Defining and advancing SystemC standard IEEE 1666-2005. http://www.systemc.org/.Google ScholarGoogle Scholar
  4. Transaction-Level Modeling (TLM) 2.0 Reference Manual. http://www.systemc.org/downloads/standards/.Google ScholarGoogle Scholar
  5. Gerd Behrmann, Alexandre David, and Kim Guldstrand Larsen. A tutorial on uppaal. In SFM, pages 200--236, 2004.Google ScholarGoogle ScholarCross RefCross Ref
  6. R. Hajisheykhi, A. Ebnenasir, and S. Kulkarni. UFIT: A tool for modeling faults in UPPAAL timed automata. In NFM, pages 429--435, 2015.Google ScholarGoogle ScholarCross RefCross Ref
  7. P. Herber, M. Pockrandt, and S.e Glesner. Transforming SystemC Transaction Level Models into UPPAAL timed automata. In MEMOCODE, pages 161--170, 2011.Google ScholarGoogle ScholarDigital LibraryDigital Library
  8. A. Janowska and P. Janowski. Slicing of timed automata with discrete data. Fundam. Inform., 72(1-3):181--195, 2006. Google ScholarGoogle ScholarDigital LibraryDigital Library
  9. K. Tanabe, S. Sasaki, and M. Fujita. Program slicing for system level designs in SpecC. In IASTED, pages 252--258, 2004.Google ScholarGoogle Scholar
  10. D. Thomas., E. Lagnese, J. Nestor, J. Rajan, R. Blackburn, and R. Walker. Algorithmic and Register-Transfer Level Synthesis: The System Architect's Workbench. Kluwer Academic Publishers, Norwell, MA, USA, 1989. Google ScholarGoogle ScholarDigital LibraryDigital Library
  11. M. Weiser. Program slicing. IEEE Trans. Software Eng., 10(4):352--357, 1984. Google ScholarGoogle ScholarDigital LibraryDigital Library

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  • Published in

    cover image ACM Other conferences
    DAC '16: Proceedings of the 53rd Annual Design Automation Conference
    June 2016
    1048 pages
    ISBN:9781450342360
    DOI:10.1145/2897937

    Copyright © 2016 ACM

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    Association for Computing Machinery

    New York, NY, United States

    Publication History

    • Published: 5 June 2016

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